- r -

• raddr : ilang::VerilogGeneratorBase::rport_t
• rdata : ilang::VerilogGeneratorBase::rport_t
• read_abstract : ilang::VlgAbsMem
• ready_type : ilang::VlgSglTgtGen
• reference_name_set : ilang::VerilogGeneratorBase
• reg_random_init : ilang::VerilogGeneratorBase::VlgGenConfig
• regs : ilang::VerilogGeneratorBase
• relchc_prob_fname : ilang::VlgSglTgtGen_Relchc
• relchc_run_script_name : ilang::VlgSglTgtGen_Relchc
• ren : ilang::VerilogGeneratorBase::rport_t
• reset_cycles : ilang::VlgTgtSupplementaryInfo::reset_config_t
• reset_sequence : ilang::VlgTgtSupplementaryInfo::reset_config_t
• reset_state : ilang::VlgTgtSupplementaryInfo::reset_config_t
• result : ilang::VerilogGeneratorBase::function_app_t , ilang::KeyVecIt< Key, T >
• ret : ilang::execute_result
• ret_type : ilang::smt::func_def_t
• rf_cond : ilang::VlgSglTgtGen , ilang::VlgVerifTgtGen
• rf_vmap : ilang::VlgSglTgtGen , ilang::VlgVerifTgtGen
• rstName : ilang::VerilogGeneratorBase
• rule_ : ilang::FuncObjRewrExpr
• run_script_name : ilang::VlgSglTgtGen_Yosys
• runnable_script_name : ilang::VlgVerifTgtGen